FDTD modeling for crosstalk reduction in coupled rlc interconnects with active shielding

Abstract

This paper presents efficient geometry for crosstalk noise and delay reduction using Active shielding in RLC interconnects with resistive drivers.FDTD modeling has been used for proposed geometry and is validated by HSPICE simulations for 32nm global interconnects.From the results it has been verified that the proposed model results and HSPICE simulations differ by 5%. From the outcomes it has been confirmed that the proposed model outcomes and HSPICE outcomes differ by 5% and by using proposed geometry crosstalk noise and delay has come down by 73% and 60% when compared to unshielded line.