Variation of source gate workfunction on the performance of dual material gate rectangular recessed channel SOI-MOSFET

Abstract

This paper attempts to propose a new device as workfunction modulated dual metal rectangular recessed channel silicon on insulator (WMDMRRC-SOI) MOSFET. This model takes the advantage of recessed channel to reduce the hot-carrier effect and a linear variation of workfunction at source side metal gate to achieve improved threshold voltage and electron transportation efficiency. The characteristics of WMDMRRC-SOI MOSFET are analyzed in terms of electron behaviour like mobility, temperature, and velocity in the channel region. The impact of negative junction depth on threshold voltage and short-channel effects like drain induced barrier lowering, subthreshold slope are analyzed to optimize the characteristics of the proposed architecture. Performance parameters of WMDMRRC-SOI MOSFET are compared with the results of DMRRC-SOI MOSFET and conventional RRC-SOI MOSFET. The comparison interprets that with higher intrinsic gain and lower distortion, the proposed architecture gives better analog performance and enhanced short channel parameters. The results obtained are validated through Sentaurus TCAD device simulator.