This paper presents an approach to a low-sensitivity design strategy for switched-current (SI) filter pairs based on a gyrator-capacitor prototype circuit. On the basis of a prototype filter, an SI counterpart circuit is obtained. Tools for SI filter design automation have been developed, which make a hardware description language - analog-mixed signal synthesization for the chosen kind of circuit. The obtained SI filter is better than the filter obtained using LC ladder structures with respect to very-large-scale integration complementary metal-oxide-semiconductor chip area and power consumption. Copyright © 2014 The Authors. International Journal of Numerical Modelling: Electronic Networks, Devices, and Fields published by John Wiley & Sons, Ltd.
CITATION STYLE
Handkiewicz, A., Katarzyński, P., Szczȩsny, S., Naumowicz, M., Melosik, M., & Śniatala, P. (2014). VHDL-AMS in switched-current analog filter pair design based on a gyrator-capacitor prototype circuit. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 27(2), 268–281. https://doi.org/10.1002/jnm.1921
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