Hybrid FPGA/ARM co-design for near real time of remote sensing imagery

Abstract

A novel hybrid co-design for implementing high-resolution reconstruction algorithms, for near real time implementation of remote sensing (RS) imagery, is addressed in this paper. In the proposed codesign scheme, the inverse square root and the matrix operations of the robust adaptive space filter algorithm are implemented as accelerators units in a Field Programmable Gate Array (FPGA) using piecewise polynomial approximations and systolic array (SA) techniques. Then, the FPGA based accelerator is integrated with an ARM processor in a HW/SW co-design paradigm that meets the (near) real time imaging systems requirements in spite of conventional computations. Finally, we report and discuss the results of the hybrid FPGA/ARM co-design implementation in a Xilinx Virtex-5 XC5VFX70TFFG1136 for reconstruction of real world RS images.