Abstract
Ultra-high speed data links such as 400GbE continuously push transceivers to achieve better performance and lower power consumption. This paper presents a highly parallelized TRX at 56Gb/s with integrated serializer/deserializer, FFE/CTLE/DFE, CDR, and eye-monitoring circuits. It achieves BER<10-12 under 24dB loss at 14GHz while dissipating 602mW of power.
Cite
CITATION STYLE
APA
Peng, P. J., Li, J. F., Chen, L. Y., & Lee, J. (2017). A 56Gb/s PAM-4/NRZ transceiver in 40nm CMOS. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference (Vol. 60, pp. 110–111). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ISSCC.2017.7870285
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