Subtractive Photonics in Bulk CMOS

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Abstract

Subtractive photonics is presented as a method for implementing photonic waveguides into any bulk CMOS or electronics process. Metal and glass are patterned in the backend layers by the foundry to reveal suspended dielectric waveguides when the metal is etched away. This method requires a simple wet etch and provides waveguiding of light up to the visible regime using the broad transparency windows of silicon oxides. Mechanical, chemical, and photonic considerations are discussed, and photonic design is extensively detailed in the context of a 180-nm CMOS process. Example waveguides are constructed and measured, with losses as low as 4.1 dB/cm for a multimode waveguide at 1550 nm. In addition, waveguides are measured in the visible range, waveguide-photodiode couplers are detailed, and electronic-photonic systems are demonstrated to be unaffected by the etching.

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Ives, C., Sarkar, D., & Hajimiri, A. (2023). Subtractive Photonics in Bulk CMOS. IEEE Journal of Solid-State Circuits, 58(11), 3030–3043. https://doi.org/10.1109/JSSC.2023.3308915

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