Analysis and Design of a Linear Ka-Band Power Amplifier in 65-nm CMOS for 5G Applications

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Abstract

A linear and broadband power amplifier (PA) for 5G phased-array is presented. The design improves the linearity by operating the transistors in deep class AB region. The design broadens the bandwidth by applying the inter-stage weakly-coupled transformer. The theory of transformers is illustrated by analyzing the odd- and even-mode model. Based on this, the odd-mode Q factor is used to evaluate the quality of impedance matching. Weakly- and strongly-coupled transformers are compared and analyzed in both the design process and applicable characteristics. Besides, a well-founded method to achieve the transformer-based balanced-unbalanced transformation is proposed. The fully integrated two-stage PA is designed and implemented in a 65-nm CMOS process with a 1-V power supply to provide a maximum small-signal gain of 19 dB. The maximum output 1-dB compressed power (P1 dB) of 17.4 dBm and the saturated output power (PSAT) of 18 dBm are measured at 28 GHz. The power-added efficiency (PAE) of the P1 dB is 26.5%. From 23 to 32 GHz, the measured P1 dB is above 16 dBm, covering the potential 5G bands worldwide around 28 GHz.

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Yu, C., & Feng, J. (2022). Analysis and Design of a Linear Ka-Band Power Amplifier in 65-nm CMOS for 5G Applications. IEICE Transactions on Electronics, E105.C(5), 184–193. https://doi.org/10.1587/transele.2021ECP5044

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