Power Tuning HPC Jobs on Power-Constrained Systems

68Citations
Citations of this article
18Readers
Mendeley users who have this article in their library.
Get full text

Abstract

As we approach the exascale era, power has become a primary bottleneck. The US Department of Energy has set a power constraint of 20MW on each exascale machine. To be able achieve one exaflop under this constraint, it is necessary that we use power intelligently to maximize performance under a power constraint. Most production-level parallel applications that run on a supercomputer are tightly-coupled parallel applications. A naíve approach of enforcing a power constraint for a parallel job would be to divide the job's power budget uniformly across all the processors. However, previous work has shown that a power capped job suffers from performance variation of otherwise identical processors leading to overall sub-optimal performance. We propose a 2-level hierarchical variation-aware approach of managing power at machine-level. At the macro level, PPartition partitions a machine's power budget across jobs to assign a power budget to each job running on the system such that the machine never exceeds its power budget. At the micro level, PTune makes job-centric decisions by taking the performance variation into account. For every moldable job, PTune determines the optimal number of processors, the selection of processors and the distribution of the job's power budget across them, with the goal of maximizing the job's performance under its power budget. Experiments show that, at the micro level, PTune achieves a performance improvement of up to 29% compared to a naíve approach. PTune does not lead to any performance degradation, yet frees up almost 40% of the processors for the same performance as that of the naíve approach under a hard power bound. At the macro level, PPartition is able to achieve a throughput improvement of 5-35% compared to uniform power distribution.

Cite

CITATION STYLE

APA

Gholkar, N., Mueller, F., & Rountree, B. (2016). Power Tuning HPC Jobs on Power-Constrained Systems. In Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT (pp. 179–190). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1145/2967938.2967961

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free