Abstract
The continuous development of wireline communication encourages transmitters to operate at higher speeds. The applications of 400GbE also push the transmitter to be designed at 112Gb/s for a single lane [1-2]. However, the use of advanced processes (<16 nm) hardly reduces the costs. This paper presents a 112Gb/s PAM-4 voltage-mode transmitter fabricated in 40nm CMOS by using the proposed two-step FFE and the automatic phase alignment techniques, improving the output bandwidth as well as the power dissipation. It delivers high-quality eye diagrams under 5.5dB loss at 28GHz with 3.89pJ/b efficiency.
Cite
CITATION STYLE
Peng, P. J., Chen, Y. T., Lai, S. T., Chen, C. H., Huang, H. E., & Shih, T. (2019). 6.7 A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference (Vol. 2019-February, pp. 124–126). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ISSCC.2019.8662361
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