Enhancing memory efficiency of Si nanocrystal floating gate memories with high-κ gate oxides

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Abstract

High-performance floating gate memory devices of Si nanocrystal (NC) dots on HfO2 gate oxide were fabricated at temperatures below 400°C. A large counterclockwise hysteresis of 5.2 V, at an applied voltage of +6 V, and a stored charge density of 6 × 1012 cm-2 were observed. Moreover, the smaller band offset of the high-κ tunneling layer resulted in higher charge tunneling probabilities towards the Si NC dots than those observed with a SiO2 tunneling layer. Advantages in terms of scaling for a high-performance and stable reliability memory device are confirmed. © 2006 American Institute of Physics.

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Punchaipetch, P., Uraoka, Y., Fuyuki, T., Tomyo, A., Takahashi, E., Hayashi, T., … Horii, S. (2006). Enhancing memory efficiency of Si nanocrystal floating gate memories with high-κ gate oxides. Applied Physics Letters, 89(9). https://doi.org/10.1063/1.2339562

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