Abstract
— Dynamic capacitively coupled domino logic (CCDL) has been proposed as a practical means of implementing lowpower and high-speed complex gates. In this paper, the CCDL gate delay characteristics obtained from an analytical model and from test circuits implemented in a I-μm GaAs E/D process are presented. In addition, the feasibility of using CCDL gates to implement practical circuits is demonstrated by the experimental characterization of a 4-b carry-lookahead adder. The adder has a critical delay of 1.1 ns and a power dissipation of 96 mW. © 1991, IEEE.
Cite
CITATION STYLE
Hoe, D. H. K., & Salama, C. A. T. (1991). Dynamic GaAs Capacitively Coupled Domino Logic (CCDL). IEEE Journal of Solid-State Circuits, 26(6), 844–849. https://doi.org/10.1109/4.78273
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