Abstract
In order to improve the LO leakage caused by the DC offset of the analog baseband signal in the direct conversion transmitter, and the drift of the low-pass filter due to process deviation, temperature change, and chip aging, a method of design and implementation of an automatic frequency-calibrated low-pass filter with DC offset cancellation is proposed. In the SPI(Serial Peripheral Interface) control mode, the filter can configure the cut-off frequency from 324 kHz to 648 kHz through the adjustable capacitor array. In the adaptive tuning mode, a digital-analog hybrid calibration structure based on the latched comparator is proposed. By calibrating the RC time constant of the chip, the cut-off frequency is 373. 8~393. 3 kHz under different PVT conditions, and the tuning accuracy relative to the nominal value of 383 kHz is-2. 4%~ 2.7%. The chip uses 0. 18 CMOS technology for tape-out verification, and the tuning circuit area is 0.045 mm2, which is only 2.2% of the main filter area. Under the 1. 8V supply voltage, the power consumption of the whole filter is 6.08 mW, and the input reference noise is 38.49 nV/(Hz)1/2.
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CITATION STYLE
Yang, H., & Qiao, S. (2023). Automatic frequency-calibrated low-pass filter with DC offset cancellation. Xi’an Dianzi Keji Daxue Xuebao/Journal of Xidian University, 50(1), 84–92. https://doi.org/10.19665/j.issn1001-2400.2023.01.010
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