A 16Mb dual-mode ReRAM macro with sub-14ns computing-in-memory and memory functions enabled by self-write termination scheme

Abstract

Recent ReRAM devices enable the development of computing-in-memory (CIM) for beyond von Neumann structure. However, wide distribution in ReRAM resistance (R) causes low yield for CIM operations. This work proposes a dual-mode computing (DMc) ReRAM macro structure with a dual-function voltage-mode self-write termination (DV-SWT) scheme to achieve both memory and fundamental CIM functions (AND, OR and XOR operations) with high yield. The DV-SWT increases the read margin for CIM operations by suppressing the R-variations caused by macro-level IR-drop and process variations. A 16Mb DMc-ReRAM full-function macro was fabricated using 1T1R HfO ReRAM devices and 0.15um CMOS process. The measured delay of the CIM operations is less than 14ns, which is 86+x faster than previous ReRAM-based CIM works. This work also represents the first CIM ReRAM macro with ReRAM device and CIM-peripheral circuits fully integrated on the same die.