An in-pixel equalizer with kTC noise cancellation and FPN reduction for time-of-flight CMOS image sensor

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Abstract

Conventional TOF depth image sensors have suffered from the reset kBTC noise of required accumulation readout of multiple-phase signal without feasible correlated double sampling (CDS) operation. This paper presents a new TOF pixel circuit with kBTC reset noise cancellation by proposed equalized reset (ER) operation. Accompanied with the differential operation of phase modulation readout for depth calculation, ER pixel effective cancel out the reset noise and reduce fixed pattern noise as well. For background suppression, sub-integrating (SI) operation is also proposed to extend the dynamic range for various applications. A prototype chip with 64×128 pixel array and 3.3V operation has been designed and fabricated in 0.13μm CMOS image sensor (CIS) technology. The pixel pitch is 10×10 um2 with a fill factor of 24.9%; and the chip size is 2.5mm×2.2mm. The measurement result shows 67% reduction of pixel fixed-pattern-noise (FPN), 300uV cancellation of kTC noise, and 23.1dB SNR improvement compared to the counterpart without ER and SI operation.

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Huang, Z. W., Chiu, C. F., & Hsieh, C. C. (2015). An in-pixel equalizer with kTC noise cancellation and FPN reduction for time-of-flight CMOS image sensor. In 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/VLSI-DAT.2015.7114520

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