Vertical surrounding gate transistors using single InAs nanowires grown on Si substrates

Abstract

We report on the fabrication and characterization of vertical InAs nanowire channel field effect transistors (FETs) with high-k/metal gate-all-around structures. Single InAs nanowires were grown on Si substrates by the selective-area metalorganic vapor phase epitaxy method. The resultant devices exhibited n-channel FET characteristics with a threshold voltage of around -0.1 V. The best device exhibited maximum drain current (/DS,max/W G), maximum transconductance (gm,max/WG), on-off ratio (/ON/OFF), subthreshold slope (SS) of 83μA/μm, 83μS/μm, 104, and 320 mV/decade, respectively, for a nanowire diameter of 100nm. © 2010 The Japan Society of Applied Physics.