A low-power CMOS readout IC design for bolometer applications

Abstract

© 2017 SPIE. A prototype of a readout IC (ROIC) designed for use in high temperature coefficient of resistance (TCR) SiGe microbolometers is presented. The prototype ROIC architecture implemented is based on a bridge with active and blind bolometer pixels with a capacitive transimpedance amplifier (CTIA) input stage and column parallel integration with serial readout. The ROIC is designed for use in high (≥ 4 %/K) TCR and high detector resistance Si/SiGe microbolometers with 17x17 μm2pixel sizes in development. The prototype has been designed and fabricated in 0.25- μm SiGe:C BiCMOS process.