Impact of Work Function Variation, Line-Edge Roughness, and Ferroelectric Properties Variation on Negative Capacitance FETs

Abstract

In this paper, the impacts of work function variation (WFV), line-edge roughness (LER), and ferroelectric properties variation on the threshold voltage, subthreshold swing (SS), Ion, and Ioff variations are analyzed comprehensively for negative capacitance ultra-thin body SOI MOSFETs (NCSOI) compared with SOI MOSFETs (SOI). For LER induced threshold voltage variation ( σ Vt), NC-SOI MOSFETs exhibit smaller σ Vt (= 3.8 mV) than the SOI MOSFETs ( σ Vt = 17.6 mV). For analyzing WFV of NC-SOI MOSFETs, two scenarios are considered including (I) same WFV patterns, and (II) different WFV patterns between the external and internal metal gates. Compared with SOI, NC-SOI with scenario (I) exhibits comparable WFV induced σ Vt (= 16.2 mV), and NC-SOI with scenario (II) exhibits larger WFV induced σ Vt (= 28.5 mV). In scenario (II), different WFV patterns between the internal and external gates result in VFE (voltage drop across the ferroelectric layer) variations, which increases the WFV induced σ Vt for NC-SOI. LER dominates energy-delay product variations ( σ EDP), and NC-SOI MOSFETs show smaller σ EDP than SOI MOSFETs. Besides, NC-SOI MOSFETs with thicker ferroelectric layer thickness ( TFE ), larger coercive electric field ( EC), and smaller remnant polarization (P0) show smaller LER induced σ Vt and σ SS. Ferroelectric properties variations show negligible impact on the WFV induced σ Vt and σ SS.