A high performance real-time simulator for controllers hardware-in-the-loop testing

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Abstract

This paper presents a high performance real-time simulator for power electronic systems applications and primarily intended for controller hardware-in-the-loop (CHIL) testing. The novelty of the proposed simulator resides in the massively parallel hardware architecture that efficiently exploits fine-grained parallelism without imposing severe communication overhead time that can limit the performance. The simulator enables the use of a nanosecond range simulation timestep to simulate power electronic systems. Through the use of this nanosecond range simulation timestep, the simulator minimizes the error arising from the intersimulation timestep switching phenomenon associated with CHIL. The proposed hardware architecture is realized based on the FPGA technology. The simulator is tested and its CHIL capability verified based on the closed-loop testing of a robust multivariable servomechanism controller for autonomous operation of a distributed generation unit. © 2012 by the authors.

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Matar, M., Karimi, H., Etemadi, A., & Iravani, R. (2012). A high performance real-time simulator for controllers hardware-in-the-loop testing. Energies, 5(6), 1713–1733. https://doi.org/10.3390/en5061713

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