Abstract
Testing the speed of po st-bond interposer wires in a 2.5-D stac ked IC is e ssential for silicon debugging, yield learning, and even for fault tolerance. In this paper, we present a novel at-speed test technique called Pulse-Vanishing test (PV-test), in which a short-duration pulse signal is applied to an interposer wire under test at the d river end. If the pulse signal can successfully propagate through the interposer wire and reach the other end, then the interposer wire is considered fault-free. Otherwise, it indicates the presence of a delay fault. This new test technique has several technical merits. For example, the Design-for-Testability (DIT) circuit for an interposer wire is similar to the boundary scan cell and can be controlled through scan chain. Also, it can be easily adapted to perform at-speed Built-In Self-Test (BIST) supporting on-the-spot diagnosis. © 2013 IEEE.
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CITATION STYLE
Huang, S. Y., Lee, J. Y., Tsai, K. H., & Cheng, W. T. (2013). At-speed BIST for interposer wires supporting on-the-spot diagnosis. In Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium, IOLTS 2013 (pp. 67–72). https://doi.org/10.1109/IOLTS.2013.6604053
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