Design and Implementation of Primitive Cells, Full Adder, Full Subtractor, and Multiplier using Modified Gate Diffusion Input Logic

Abstract

The rapid growth in the use of portable systems has sparked research and development in the field of microelectronics especially for power consumption. Since battery technology does not match the speed of microelectronics, Low-power technology has become an important technological factor. MGDI is a minimum-power architecture design, which is quite a Gate Diffusion Input (GDI) change and is the lowest design method optimal for rapid, low power circuitry model using a reduced number of a transistor. Here, primitive cells-AND, OR, and XOR gates, full adders, full subtractors, and 4×4 multiplier have been proposedusing the 180nm technology-dependent MGDI in Cadence Virtuoso device. The main downside associated with GDI is that this strategy cannot resolve the bulk terminal which is not sufficiently biased. So that the number transistor count and delay will be reduced.