Fin-height effect on poly-Si/PVD-TiN stacked-gate FinFET performance

Abstract

We compared the electrical characteristics, including mobility and on -state current I on, of n +-poly-Si/PVD-TiN stacked-gate FinFETs with different fin heights H fin. The mobility was enhanced in devices with taller fins due to increased tensile stress. However, as gate length L g decreases, I on for devices with tall fins becomes worse, probably due to a high parasitic resistance R p. Furthermore, V th variation increased with increasing H fin due to rough etching of the fin sidewall. Process technologies for reducing R p and etching technology that yields smooth precise profiles are essential to exploit the high performance of tall FinFETs. © 2011 IEEE.