A Multilayer High-Speed Magnetic-Tunnel-Junction Magneto-resistive RAM Structure with Read-Disturb-Detection Circuit by Using Nano-Electronics Quantum Dot Cellular Method

Abstract

In this nano technical world the “Complementary MOS technology” can be replaced by using “Quantum Dot Cellular Automata” with reversible logical phenomenon to achieve a fault tolerant, low-cost nano electronics formation by feature size, latency and power consumption minimization. The memory is one of the most interesting part of research in this digital world. This paper represents an optimizing high-frequency (in THz) reversible design of a “Random Access Memory” which is simulated by using nano electronics ‘QCA’ simulator to get a better performance than “Complementary MOS technology” with high frequency (in THz), less occupied area and dissipated power. This paper also shows a highly-flexible magnetic quantum cell logic-design and MTJ logical representation which is used for non-volatile MRAM which is widely used in digital electronics world and as a part of aerospace and military device. A reversible nano electronics formation of the control logic to select the word-line and input-line of the MRAM also presented here. The reversible-logic can avoid the information-loss in memory device by zero-heating technique. Non-reversible formations dissipate ‘KTln2’ energy per bit which can be ignored in reversible formation. But, read disturb at low write current is a major issue of MTJ MRAM due to the same path of read/write current path. In this paper a three dimension reversible “Read Disturb Detection Circuit” is formed by nano electronics ‘QCA’ technology which bit-wise follows the control logic of read-disturb-detection technique and the same figure also simulated by ‘VHDL’ coding in Xilinx software to prove the advantages of ‘QCA’ technology contrast to Xilinx This paper also focuses on the correspondence between change of temperature and supply power.