High inductance density in CMOS-compatible magnetically integrated 3D microinductors for radio-frequency applications

Abstract

On-chip inductors enable high integration in radio-frequency electronics, critical for compact, power-efficient systems. However, they often occupy a large chip area due to low inductance density (D, defined as the total inductance per unit area) that scales sublinearly with conductor length (l) in planar architectures. Here, we present a three-dimensional rolled-up, magnetically integrated microinductor technology with record-high inductance density. By exploiting a superlinear scaling law (D ∝ l2.4) via 3D winding with magnetic thin films, our devices achieve 8333 nH/mm² at 0.55 GHz—over two orders of magnitude higher than conventional planar inductors. This breakthrough stems from a 3D geometry in which strained layers confine multiple turns in a compact tubular volume, intensifying local fields and flux linkage while reducing leakage. A wafer-scale, CMOS-compatible process yields self-assembled coils that roll 10 mm of planar conductors into ~240 μm-diameter microcoils. The high inductance density, low substrate losses, and GHz operation make magnetically integrated inductors suited for more compact radio-frequency systems-on-chip and high-frequency power modules and next-generation Internet of Things/5G/6G applications.