Fast digital post-processing technique for integral nonlinearity correction of analog-to-digital converters: Validation on a 12-bit folding-and- interpolating analog-to-digital converter

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Abstract

The semiconductor industry tends to constantly increase the performances of developed systems with an ever-shorter time-to-market. In this context, the conventional strategy for mixed-signal component design, which is based only on analog design effort, will no longer be suitable. In this paper, a digital correction technique is presented for analog-to-digital converters (ADCs). The idea is to use a lookup table (LUT) for the online correction of integral nonlinearity (INL). The main challenge for this kind of technique is the cost in time and resources to estimate the actual INL of the ADC needed to load the LUT. In this paper, we propose to extract INL with a very rapid procedure based on spectral analysis. We validate our technique on a 12-bit folding-and- interpolating ADC and we demonstrate that the correction is efficient for a large range of application fields. © 2006 IEEE.

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Kerzérho, V., Fresnaud, V., Dallet, D., Bernard, S., & Bossuet, L. (2011). Fast digital post-processing technique for integral nonlinearity correction of analog-to-digital converters: Validation on a 12-bit folding-and- interpolating analog-to-digital converter. IEEE Transactions on Instrumentation and Measurement, 60(3), 768–775. https://doi.org/10.1109/TIM.2010.2060222

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