Abstract
Neural Network (NN) accelerators with emerging ReRAM (resistive random access memory) technologies have been investigated as one of the promising solutions to address the memory wall challenge, due to the unique capability of processing-in-memory within ReRAM-crossbar-based processing elements (PEs). However, the high efficiency and high density advantages of ReRAM have not been fully utilized due to the huge communication demands among PEs and the overhead of peripheral circuits. In this paper, we propose a full system stack solution, composed of a reconfigurable architecture design, Field Programmable Synapse Array (FPSA) and its software system including neural synthesizer, temporal-to-spatial mapper, and placement & routing. We highly leverage the software system to make the hardware design compact and efficient. To satisfy the high-performance communication demand, we optimize it with a reconfigurable routing architecture and the placement & routing tool. To improve the computational density, we greatly simplify the PE circuit with the spiking schema and then adopt neural synthesizer to enable the high density computation-resources to support different kinds of NN operations. In addition, we provide spiking memory blocks (SMBs) and configurable logic blocks (CLBs) in hardware and leverage the temporal-to-spatial mapper to utilize them to balance the storage and computation requirements of NN. Owing to the end-to-end software system, we can efficiently deploy existing deep neural networks to FPSA. Evaluations showthat, compared to one of state-of-the-art ReRAMbased NN accelerators, PRIME, the computational density of FPSA improves by 31×; for representative NNs, its inference performance can achieve up to 1000× speedup.
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CITATION STYLE
Ji, Y., Zhang, Y., Xie, X., Li, S., Wang, P., Hu, X., … Xie, Y. (2019). FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture. In International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS (pp. 733–747). Association for Computing Machinery. https://doi.org/10.1145/3297858.3304048
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