Thermal synergies in 50 nanometer CMOS and below

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Abstract

An analysis of the metal oxide semiconductor field effect transistor (MOSFET) in strong inversion indicates two bias regions, in each of its triode and saturation conditions, whose distinct properties are elaborated and shown to lead to simple, systematic, design procedures for achieving low temperature coefficient (TC) voltages (

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Shoucair, F. S. (2021). Thermal synergies in 50 nanometer CMOS and below. IET Circuits, Devices and Systems, 15(2), 183–196. https://doi.org/10.1049/cds2.12002

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