Easily testable realizations for logic functions

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Abstract

Desirable properties of “easily testable networks” are given. A realization for arbitrary logic function, using AND and exclusive-or gates, based on Reed-Muller canonic expansion is given that has many of these desirable properties. If only permanent stuck-at-0 (s-a-O) or stuck-at-1 (s-a-1) faults occur in a single AND gate or only a single exclusive-or gate is faulty, the following results are derived on fault detecting test sets for the proposed networks 1) only (n/4) tests, independent of the function being realized are required if the primary inputs are fault-free; 2) only 2n. additional inputs (which depend on the function realized) are required if the primary inputs can be faulty, where ne is the number of variables appearing in even number of product terms in the Reed-Muller canonical expansion of the function; and 3) the additional 2ne inputs are not required if the network is provided with an observable point at the output of an extra AND gate. It is further shown that the networks to generate the test sets and to interpret the results of testing are simple and easy to design. Copyright © 1972 by The Institute of Electrical and Electronics Engineers, Inc.

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APA

Reddy, S. M. (1972). Easily testable realizations for logic functions. IEEE Transactions on Computers, C21(11), 1183–1188. https://doi.org/10.1109/T-C.1972.223475

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