VHDL Implementation of CORDIC Algorithm for Wireless LAN

Abstract

This paper presents the CORDIC Algorithm for Wireless LAN. The main aim of this topic is to create a VHDL description for CORDIC Algorithm. The basic research is carried out in MATLAB. The VHDL implementation of CORDIC algorithm is based on results obtained from Xilinx ISE simulation. XILINX Spartan-3FPGA is used for hardware implementation.