Analysis of CNT bundle and its comparison with copper interconnect for CMOS and CNFET drivers

Abstract

In nanoscale regime as the CMOS process technology continues to scale, the standard copper (Cu) interconnect will become a major hurdle for onchip communication due to high resistivity and electromigration. This paper presents the comprehensive evaluation of mixed CNT bundle interconnects and investigates their prospects as a low power high-speed interconnect for future nanoscale-integrated circuits. The performance of mixed CNT bundle interconnect is examined with carbon nanotube field effect transistor (CNFET) as a driver and compared with the traditional interconnect, that is, CMOS driver on Cu interconnect. All HSPICE simulations are carried out at operating frequency of 1GHz and it is found that mixed CNT bundle interconnects with CNFET as the driver can potentially provide a substantial delay reduction over traditional interconnects implemented at 32nm process technology. Similarly, the CNFET driver with mixed CNT bundle as interconnect is more energy efficient than the traditional interconnect at all supply voltages (VDD) from 0.9V to 0.3V.