Rapid VLIW processor customization for signal processing applications using combinational hardware functions

Abstract

This paper presents an architecture that combines VLIW (very longinstruction word) processing with the capability to introduceapplication- specific customized instructions and highly parallelcombinational hardware functions for the acceleration of signalprocessing applications. To support this architecture, acompilation and design automation flow is described for algorithmswritten in C. The key contributions of this paper are as follows:(1) a 4-way VLIW processor implemented in an FPGA, (2) largespeedups through hardware functions, (3) a hardware/softwareinterface with zero overhead, (4) a design methodology forimplementing signal processing applications on this architecture,(5) tractable design automation techniques for extracting andsynthesizing hardware functions. Several design tradeoffs for thearchitecture were examined including the number of VLIW functionalunits and register file size. The architecture was implemented onan Altera Stratix II FPGA. The Stratix II device was selectedbecause it offers a large number of high-speed DSP (digital signalprocessing) blocks that execute multiply-accumulate operations.Using the MediaBench benchmark suite, we tested our methodologyand architecture to accelerate software. Our combined VLIWprocessor with hardware functions was compared to that of softwareexecuting on a RISC processor, specifically the soft core embeddedNIOS II processor. For software kernels converted into hardwarefunctions, we show a hardware performance multiplier of up to230 times that of software with an average 63 times faster.For the entire application in which only a portion of the softwareis converted to hardware, the performance improvement is as muchas 30X times faster than the nonaccelerated application, with a12X improvement on average. Copyright © 2006 Hindawi Publishing Corporation. All rights reserved.