2D Analytical Modeling of Surface Potential for GaAs based Nanowire Gate All Around MOSFET

Abstract

Now-a-days, the development of minimization of device dimension by the improvement of several device structures, among which tunneling field effect transistors (TFETs) play a vital role which reduce various short channel effects (SCEs). In this paper, a GaAs based 2-D analytical model for fully depleted cylindrical gate MOSFET is presented. In this paper, we solve 2D Poisson's equation for GAA MOSFET and derived the expression for surface potential along the channel length with suitable boundary condition. The model is used to study the immunity against SCE offered by the MOSFET structure. Additional the model is used to formulate an analytical expression of the surface potential. Also, the effect of various physical device parameters whose range varies such as for Tube thickness (10nm-1nm), Radius (5-10nm), temperature (100K-700K) on surface potential of the device. The advantages of surface potential are based models to make ease for the upcoming compact MOSFET models. The model has been simulated using MATLAB.