3D Monolithically Integrated Device of Si CMOS Logic, IGZO DRAM-like, and 2D MoS2 Phototransistor for Smart Image Sensing

Abstract

We proposed a three-tier monolithic 3D (M3D) integration technology and constructed a unique platform to enable smart image sensor on an 8"Si wafer. In this platform, the 1st tier's laser-annealed 20nm Si FinFETs successfully demonstrated logic inverter, NAND and NOR functions. The 2nd tier's IGZO DRAM-like devices provided long data retention (>1000s) and robust non-destructive high current read. It is capable to serve as low-power working memory and MAC accelerator for computing-in-memory functions when configured in AND-type array. The top layer is a 5x5 array of MoS2 TMD phototransistors with ultrahigh responsivity (>103 A/W) and tunable photogain (10°~104) for image sensing. All the functional units were fabricated by low-thermal budget processes and were connected by fine- pitch vertical interconnects for parallel signal processing.