Abstract
The self-heating effect is particularly important for transistors in SOI circuitry where the device is separated from the substrate by a low thermal conductivity buried silicon dioxide layer as well as copper interconnects that are surrounded by low thermal conductivity dielectric materials (Borkar, 1999). Accurate thermal modeling and design of microelectronic devices and thin film structures at micro-and nanoscales poses a challenge to the thermal engineers who are less familiar with the basic concepts and ideas in subcontinuum heat transport. From the discussion presented so far, we might conclude that device simulation without lattice heating has reached high levels of sophistication even in the quantum domain area. The inclusion of lattice heating is done using the energy balance picture by the group from Arizona State University or by including the heat flux term that accounts for the number of generated acoustic and optical phonons in a given mode. Both of these approaches have their advantages and disadvantages. Important point is that understanding heat conduction surrounding nanostructures is just at the beginning. Many questions remain to be answered and new applications need to be explored.
Cite
CITATION STYLE
Vasileska, D., Raleva, K., & M., S. (2010). Heating Effects in Nanoscale Devices. In Cutting Edge Nanotechnology. InTech. https://doi.org/10.5772/8861
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