FPGA based On-Chip Phase Measurement System

Abstract

Phase measurement is generally significant in electronic applications where the asynchronous connection between the signals requires to be defended — conventional automated frameworks used for time estimation, which are planned to use an old-style mixed-signal method. With the appearance of reconfigurable equipment, for example, Field Programmable Gate Array (FPGA), it is progressively worthwhile for researchers to choose for all-advanced design. Fast sequential handsets of FPGA hardware don't confirm the comparable chip inertness after each power cycle and reset cycle. This reason vulnerability of stage connection between recovered signals.In this paper, a reaearchofthephase measurement system with a focus on the frequently utilized techniques for highresolution electronic applications is presented. The effects of phase measurement are evaluated on various performance metrics such as peak to peak jitter, power consumption,and chip area, etc.Thisresearch work motivates the researchers to do further research to preserve the synchronous relationship between signals in network-on-chip.