In this investigation, a system-in-package (SiP) that consists of a very low-cost interposer with through-silicon holes (TSHs) and with chips on its top and bottom sides (a real 3-D IC integration) is studied. Emphasis is placed on the fabrication of a test vehicle to demonstrate the feasibility of this SiP technology. The design, materials, and process of the top chip, bottom chip, TSH interposer, and final assembly will be presented. Shock and thermal cycling tests will be performed to demonstrate the integrity of the SiP structure.
CITATION STYLE
Lau, J. H., Lee, C. K., Zhan, C. J., Wu, S. T., Chao, Y. L., Dai, M. J., … Kao, M. J. (2014). Through-Silicon Hole Interposers for 3-D IC Integration. IEEE Transactions on Components, Packaging and Manufacturing Technology, 4(9), 1407–1419. https://doi.org/10.1109/TCPMT.2014.2339832
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