Sentinel Scheduling for VLIW and Superscalar Processors

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Abstract

Speculative execution is an important source of parallelism for VLIW and superscalar processors. A serious challenge with compiler-controlled speculative execution is to accurately detect and report all program execution errors at the time of occurrence. In this paper, a set of architectural features and compile-time scheduling support referred to as sentinel scheduling is introduced. Sentinel scheduling provides an effective framework for compiler-controlled speculative execution that accurately detects and reports all exceptions. Sentinel scheduling also supports speculative execution of store instructions by providing a store buffer which allows probationary entries. Experimental results show that sentinel scheduling is highly effective for a wide range of VLIW and superscalar processors. © 1992, ACM. All rights reserved.

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Mahlke, S. A., Chen, W. Y., Hwu, W. M. W., Rau, B. R., & Schlansker, M. S. (1992). Sentinel Scheduling for VLIW and Superscalar Processors. ACM SIGPLAN Notices, 27(9), 238–247. https://doi.org/10.1145/143371.143529

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