Ta/HfO2memristors: From device physics to neural networks

Abstract

Hardware implementation of neural networks with memristors can break the "von-Neumann bottleneck,"offer massive parallelism, and hence substantially boost computing throughput and energy efficiency. In this review, we first explain the design principles and switching mechanism of a Ta/HfO2 memristor. We show that the device meets most key requirements on device properties for in-memory computing. We then introduce the integration of the memristor with foundry-made metal-oxide-semiconductor transistors and the programming of the one-transistor-one-resistance switch (1T1R) arrays. We demonstrate that the crossbar arrays can be used in various neural networks. Finally, we discuss the remaining challenges of scaling up the memristive neural networks for larger scale real-world problems.