Real Time Hardware Co-Simulation for Blind Image Separation Algorithm Using ZYNG 7000 & Xilinx System Generator

Abstract

The implementation of blind image processing required a solid background knowledge of the design and description languages of the material. This paper describes an effective method for implementing real-time blind image separation algorithms on hardware, without needing a comprehensive knowledge of hardware design and description languages(VHDL).This study concerns the separation of a mixture of images, with no prior information on the images or on the way they have been mixed together. It describes the methodology for implementing real-time DSP applications on FPGAs and the concept of hardware/software co-simulation of the blind image separation algorithm using MATLAB Simulink and Xilinx System Generator (XSG). The performance of efficient architectures is implemented on the ZYBO Z7 Zynq-7020 FPGA.