Implementation of Highly Reliable and Energy‐Efficient Nonvolatile In‐Memory Computing using Multistate Domain Wall Spin–Orbit Torque Device

Abstract

Emerging in-memory computing (IMC) technology promises to tackle the memory wall bottleneck in modern systems. Promoted as a promising building block, nonvolatile spin–orbit torque (SOT) memory devices with sub-ns and sub-pJ processing capabilities are thereby extensively pursued. Herein, a new type of domain wall device is experimentally presented with multistates driven by nonvolatile SOT and Dzyaloshinskii–Moriya interaction, enabling time and energy-efficient IMC with a full adder (FA) implementation based on magnetic tunnel junctions. Complementary micromagnetic and device–circuit cosimulation results show that the write/read latency of the proposed FA can be shortened to 1.25 ns/0.22 ns with an averaged writing energy of 8.41 fJ bit−1, and the overall dynamic power is 26.25 μW, which is 4.43–51.96 times lower than state-of-the-art alternatives. Moreover, the developed architecture can perform all 16 Boolean logic functions, warranting an extensive arithmetic operation. The experimental, micromagnetic, and circuit-level simulation results show great potential in both fundamental research and new trajectories in technology development for nonvolatile in-memory computing applications.