A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole

2Citations
Citations of this article
7Readers
Mendeley users who have this article in their library.

This article is free to access.

Abstract

A simple method to tune the output pole of a passive mixer is proposed which leads to up to 33 dB improvement in an IEEE 802.15.4 standard compatible receiver’s IF section IIP3. This method is used in the design of an ultra-low power receiver front-end which consumes just 2.2 mW from a 1-V supply while achieving a SSB NF of approximately 9 dB. The energy-aware architecture allows for a 70 % reduction in the nominal power consumption (down to 0.7 mW) under strong signal conditions while improving the receiver’s IIP3 and not affecting the receiver’s input matching. The receiver is designed in a 0.18-μm RFCMOS technology.

Cite

CITATION STYLE

APA

Do, A. V. T., Boon, C. C., Krishna, M. V., Manh Do, A., & Yeo, K. S. (2012). A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole. In IFIP Advances in Information and Communication Technology (Vol. 373, pp. 1–21). Springer New York LLC. https://doi.org/10.1007/978-3-642-28566-0_1

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free