Power efficient successive approximation adc with double tail dynamic latch comparator

Abstract

Analog to Digital converters (ADC) are used in medical instruments that serves as an essential part as the interface between analog and digital signal processing system. Low power design is needed for large battery life. Commonly used ADC is the successive Approximation Register (SAR) ADC. The other ADC models are Pipeline ADC, Flash ADC, integration ADC, Sigma Delta ADC. ADCs are chosen by considering resolution, power, size, frequency, performance and so on. A SAR ADC is selected for such applications because of its low power and tiny size. The essential engineering of SAR ADC comprise of sample and hold circuit, SAR, ADC and voltage comparator. This paper deals with double tail dynamic latch comparator which is replaced with thecomparator of SAR ADCs. The parameter estimations, like utilization of power, Signal to Noise ratio and resolution are carried out for SAR ADC. The schematic of SAR ADC has been designed using Tanner tool.