Technology-Dependent Capacity Analysis for 6G RF Front Ends With D-Band Implementation Using 22-nm CMOS SOI

Abstract

This article presents a system-level analysis of the maximum achievable data rate in a phased array wireless link limited by the RF front end (FE) technology and frequency-dependent noise and linearity performance. Frequency scalable circuit models of RF front-end amplifiers and front-end switch were created from literature data of 22-nm fully depleted silicon on insulator (SOI) CMOS technology. The analysis was continued by optimizing the transmit and receive array sizes and center frequency for minimal dissipated power for a given data rate and link range. A front-end circuit with a center frequency of 150 GHz is predicted to satisfy 6G data rate (120 Gb/s) and range (100 m). Consequently, a prototype RF front end was implemented and measured to verify the validity of the frequency scalable behavioral models. The front-end switch was designed for minimal impact on transmitter (TX) output power and receiver (RX) noise figure (NF) reaching saturated output power of 9.7 dBm and 11.4-dB noise figure for transmitter and receiver at 142 and 144 GHz, respectively. The transmitter was measured with a 5G new radio (NR) orthogonal frequency-division multiplexing (OFDM) 800-MHz multicarrier signal achieving 2.8-dBm output power while meeting 5G adjacent channel power ratio (ACPR) and error vector magnitude (EVM) specifications. The results from the system analysis together with the implemented front end give a strong indication of the need for highly linear receiver mixers, multiple-input multiple-output (MIMO) schemes, and RF bandwidth (BW) extension techniques to reach 6G data rate expectations with reasonable power consumption and array sizes.