A verified information-flow architecture

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Abstract

SAFE is a clean-slate design for a highly secure computer system, with pervasive mechanisms for tracking and limiting information flows. At the lowest level, the SAFE hardware supports fine-grained programmable tags, with efficient and flexible propagation and combination of tags as instructions are executed. The operating system virtualizes these generic facilities to present an information-flow abstract machine that allows user programs to label sensitive data with rich confidentiality policies. We present a formal, machine-checked model of the key hardware and software mechanisms used to control information flow in SAFE and an endto-end proof of noninterference for this model.

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APA

De Amorim, A. A., Collins, N., DeHon, A., Demange, D., Hritcu, C., Pichardie, D., … Tolmach, A. (2014). A verified information-flow architecture. In ACM SIGPLAN Notices (Vol. 49, pp. 165–178). https://doi.org/10.1145/2578855.2535839

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