A 3rd‐Order FIR Filter Implementation Based on Time‐Mode Signal Processing

Abstract

This paper presents the hardware implementation of a 3rd‐order low‐pass finite impulse response (FIR) filter based on time‐mode signal processing circuits. The filter topology consists of a set of novel building blocks that perform the necessary functions in time‐mode including z−1 opera-tion, time addition and time multiplication. The proposed time‐mode low‐pass FIR filter was designed in a 28 nm Samsung fully‐depleted silicon‐on‐insulator FD‐SOI process under 1 V supply voltage with 5 MHz sampling frequency. Simulation results validate the theoretical analysis. The FIR filter achieves a signal‐to‐noise‐plus‐distortion ratio (SNDR) of 38.6 dB at the input frequency of 50 KHz consuming around 200 μW.