System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic

10Citations
Citations of this article
8Readers
Mendeley users who have this article in their library.
Get full text

Abstract

Networks-on-chip need to survive to manufacturing faults in order to sustain yield. An effective testing and configuration strategy however implies two opposite requirements. On one hand, a fast and scalable built-in self-testing and self-diagnosis procedure has to be carried out concurrently at NoC switches. On the other hand, programming the NoC routing mechanism to go around faulty links and switches can be optimally performed by a centralized controller with global network visibility. This paper proposes a global hardware infrastructure that meets such requirements by means of a fault-tolerant dual network architecture and a configuration strategy for reprogramming the routing mechanism of each switch. This is the first complete infrastructure for testing and reconfiguring a NoC based on reprogrammable routing logic. © 2011 IEEE.

Cite

CITATION STYLE

APA

Ghiribaldi, A., Ludovici, D., Favalli, M., & Bertozzi, D. (2011). System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic. In 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011 (pp. 308–313). https://doi.org/10.1109/VLSISoC.2011.6081597

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free