Abstract
In this article, we present a comprehensive design and benchmarking study of content addressable memory (CAM) at the 7-nm technology node in the context of similarity search applications. We design CAM cells based on static random access memory (SRAM), spin-orbit torque (SOT), and ferroelectric field effect transistor devices and from their layouts extract cell parasitics using state-of-the-art electronic design automation (EDA) tools. These parasitics are used to develop SPICE netlists to model search operations. We use a CAM-based dataset search and a sequential recommendation system (RS) to highlight the application-level performance degradation due to interconnect parasitics. We propose and evaluate two solutions to mitigate interconnect effects.
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CITATION STYLE
Narla, S., Kumar, P., Adnaan, M., & Naeemi, A. (2025). Cross-Layer Modeling and Design of Content Addressable Memories in Advanced Technology Nodes for Similarity Search. IEEE Transactions on Electron Devices, 72(1), 240–246. https://doi.org/10.1109/TED.2024.3506509
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