Abstract
A simple systolic array for achieving the effect of modular reduction, in linear time, is described. This circuit, in conjunction with Atruin’s multiplier, performs modlriar multiplication in linear time.
Cite
CITATION STYLE
APA
Even, S. (1991). Systolic modular multiplication. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 537 LNCS, pp. 620–624). Springer Verlag. https://doi.org/10.1007/3-540-38424-3_44
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