Full-duplex wireless: Algorithms and rate improvement bounds for integrated circuit implementations

Abstract

Full-duplex (FD) communication can substantially improve spectrum efficiency in wireless networks. Designing higher layer algorithms (e.g., for power control and scheduling) tailored for FD requires taking into account the special characteristics of the physical layer. In particular, the characteristics of recently introduced integrated circuit (IC) implementations required for mobile devices pose unique challenges. Thus, we describe some of our recent results in the area of antenna and analog/RF cancellation. Then, we overview our corresponding results regarding rate gains and algorithm design when considering these IC-based FD implementations. Finally, we discuss cross-layered open problems.