Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION

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Abstract

Ge n- and p-FinFETs with different interfacial layer ferroelectric HfZrOx (IL-FE-HZO) gate stacks have been demonstrated systematically by various annealing conditions for the first time. Microwave annealing (MWA) not only shows enhanced FE characteristics but also suppresses the gate leakage and Ge interdiffusion compared with conventional rapid thermal annealing (RTA). While HZO on Al2O3 IL results in paraelectric behavior, HZO on GeOx IL exhibits significant FE. High Ion/Ioff (> 107) and low subthreshold slope (S.S. ∼ 58 mV/dec.) are demonstrated by a Ge nFinFET with a gate length (Lg) of 60 nm and a FE-HZO/GeOx gate stack.

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Su, C. J., Tang, Y. T., Tsou, Y. C., Sung, P. J., Hou, F. J., Wang, C. J., … Wang, Y. H. (2017). Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION. In Digest of Technical Papers - Symposium on VLSI Technology (pp. T152–T153). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.23919/VLSIT.2017.7998159

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