Journal Article

A Class of Linear Codes for Error Control in Byte-per-Card Organized Digital Systems

IEEE Transactions on Computers (1978) C-27(5) 455-459
DOI: 10.1109/TC.1978.1675126
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Abstract

To improve the reliability of computer memories error-correcting and/or error-detecting codes have been successfully used. To provide for error control in systems organized to have b bits per card a new class of codes for simultaneous error correction and error detection is given. Copyright © 1978 by The Institute of Electrical and Electronics Engineers, Inc.

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Reddy, S. M. (1978). A Class of Linear Codes for Error Control in Byte-per-Card Organized Digital Systems. IEEE Transactions on Computers, C–27(5), 455–459. https://doi.org/10.1109/TC.1978.1675126

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